Several types of multiplier circuits are known in the art, these being analog multiplier circuits, digital signal processors, and time-division multipliers.
An analog multiplier circuit obtains the product of two time-varying signals directly in the analog domain. The product signal output by the analog multiplier circuit may be converted into a digital format by means of an analog-to-digital (A/D) output stage. In power metering applications, the two time-varying input signals represent the voltage and the current in an electrical distribution network. In order to compute energy or average power consumption, the output of the A/D output stage is integrated by means of a digital integrator.
Analog multiplier circuits have an inherent high frequency response, but have a disadvantage in that they exhibit poor linearity. Improvements to the linearity of analog multipliers are difficult and expensive to achieve, particularly where the multipliers are solid-state multipliers such as those implemented in CMOS technology. Similarly, temperature stability is also difficult to achieve in solid state analog multipliers. The only mathematical result available from this type of analog multiplier circuit is the product of the two input signals. Although this type of multiplier circuit has a high frequency response, this does not offer any advantage for power metering, which is largely a low-frequency application.
In a multiplier which is based on digital signal processing, the two analog time-varying input signals are converted into digital format, usually by means of oversampling A/D converters. The converted signals are then filtered, and the product of the two filtered signals is then obtained directly in the digital domain. As is the case with other types of multipliers, the output product signal may be integrated by means of a digital integrator in order to compute energy or power consumption in power metering applications.
This type of multiplier incorporates few analog circuits as signal multiplication is performed digitally. Oversampling A/D converters are standard components available in cell libraries for solid state implementation. Such multipliers exhibit good linearity, and analog circuit imperfections and component mismatches may be easily compensated.
A further advantage of this type of multiplier is that additional data, such as the phase shift between the input signals, or the frequency of the input signals, may be easily derived from the digitised input signals.
This type of multiplier is characterised by a high gate count due to the digital computations which must be performed. The high gate count requires a large semiconductor die size for solid-state implementation, which makes this type of multiplier uneconomic for low-cost applications such as power metering.
A further disadvantage of this type of multiplier is that additional memory storage must be provided for the input filter coefficients. This memory storage may be either on-chip, in which case the gate count increases further, or an external memory. This type of multiplier usually requires extensive software support, including both the filtering and multiplication algorithms.
In a time-division multiplier, one of the time-varying input signals is modulated to produce a pulse width modulated (PWM) signal. The PWM signal is used to control the polarity of the second signal into the input of an integrator. The output of the integrator is a signal representing the product of the two time-varying input signals. For power metering applications, the product signal is converted to a digital signal and is integrated by a digital integrator for computation of energy and average power consumption.
Time division multipliers are stable and have good linearity characteristics, but have the disadvantage that they require special purpose analog circuitry such as a pulse width modulator. Further, a time division multiplier produces only the product of the input signals, as well as its integral.